The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent the work is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of tiling, are neither expressly nor impliedly admitted as prior art against the present disclosure.
Analog-to-Digital Converters (ADCs) are electronic devices that have become a fundamental building block in everything from power supplies to cell phones. One of the challenges to designing ADCs is to assure that their performance meets design requirements, such as conversion speed and accuracy, while being made as inexpensively as possible. One particular type of known ADC is called a pipelined ADC, which uses a series of pipelined stages to digitize signals, for instance, one bit at a time. A variant of the pipelined ADC is known as the cyclic ADC, which applies the general concept of digitizing signals one bit at a time, but uses a single conversion stage with feedback so as to emulate a pipeline. While the cyclic approach takes far longer to convert signals than a pipelined ADC for the same number of bits, there is a proportionate saving in hardware. For example, while a 12-bit cyclic ADC may take twelve times longer to convert a given signal than a 12-bit pipelined converter, the cyclic ADC may use only one-twelfth of the conversion cells required by the pipelined ADC. Unfortunately, both cyclic and pipelined converters are subject to manufacturing constraints, and component mismatch caused by real world manufacturing limitations may cause substantial conversion errors. Accordingly, new technology for compensating for such manufacturing limitations may be desirable.